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Investigate the high-level HDL Chisel

  • Chisel (Constructing Hardware in a Scala embedded language) is a new programming language, which embedded in Scala, used for hardware synthesis. It aims to increase productivity when creating hardware by enabling designers to use features present in higher level programming languages to build complex hardware blocks. In this paper, the most advertised features of Chisel are investigated and compared to their VHDL counterparts, if present. Afterwards, the authors’ opinion if a switch to Chisel is worth considering is presented. Additionally, results from a related case study on Chisel are briefly summarized. The author concludes that, while Chisel has promising features, it is not yet ready for use in the industry.

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Author:Florian Heilmann, Christian Brugger, Norbert Wehn
URN (permanent link):urn:nbn:de:hbz:386-kluedo-36380
Document Type:Report
Language of publication:English
Publication Date:2013/10/28
Date of first Publication:2013/10/18
Publishing Institute:Technische Universität Kaiserslautern
Date of the Publication (Server):2013/10/28
Tag:Chisel; Field-programmable gate array (FPGA); Hardware Description Langauge (HDL); Investigation
Number of page:2
Faculties / Organisational entities:Fachbereich Elektrotechnik und Informationstechnik
DDC-Cassification:6 Technik, Medizin, angewandte Wissenschaften / 620 Ingenieurwissenschaften und Maschinenbau
Licence (German):Standard gemäß KLUEDO-Leitlinien vom 10.09.2012