TY  - CONF
A1  - Chen, Yong-Xiao
A1  - Li, Jin-Fu
T1  - Architecture Evaluation Tool for 3D CAMs
N2  - Three-dimensional (3D) integration using through- silicon via (TSV) has been used for memory designs. Content addressable memory (CAM) is an important component in digital systems. In this paper, we propose an evaluation tool for 3D CAMs, which can aid the designer to explore the delay and power of various partitioning strategies. Delay, power, and energy models of 3D CAM with respect to different architectures are built as well.
KW  - CAM
Y1  - 2016
UR  - https://kluedo.ub.uni-kl.de/frontdoor/index/index/docId/4327
UR  - https://nbn-resolving.org/urn:nbn:de:hbz:386-kluedo-43279
ER  -