TY  - CONF
A1  - Azarkhish, Erfan
A1  - Rossi, Davide
A1  - Loi, Igor
A1  - Benini, Luca
T1  - A Case for Near Memory Computation Inside the Smart Memory Cube
N2  - 3D integration of solid-state memories and logic, as demonstrated by the Hybrid Memory Cube (HMC), offers major opportunities for revisiting near-memory computation and gives new hope to mitigate the power and performance losses caused by the “memory wall”. In this paper we present the first exploration steps towards design of the Smart Memory Cube (SMC), a new Processor-in-Memory (PIM) architecture that enhances the capabilities of the logic-base (LoB) in HMC. An accurate simulation environment has been developed, along with a full featured software stack. All offloading and dynamic overheads caused by the operating system, cache coherence, and memory management are considered, as well. Benchmarking results demonstrate up to 2X performance improvement in comparison with the host SoC, and around 1.5X against a similar host-side accelerator. Moreover, by scaling down the voltage and frequency of PIM’s processor it is possible to reduce energy by around 70% and 55% in comparison with the host and the accelerator, respectively.
KW  - Near Memory Computation
KW  - Smart Memory Cube
KW  - PIM
KW  - HMC
Y1  - 2016
UR  - https://kluedo.ub.uni-kl.de/frontdoor/index/index/docId/4324
UR  - https://nbn-resolving.org/urn:nbn:de:hbz:386-kluedo-43241
ER  -